The present invention is directed integrated circuits and their processing for the manufacture of semiconductor devices. More particularly, the invention provides a method for forming small features such as contacts for integrated circuit device structures. But it would be recognized that the invention has a much broader range of applicability. For example, the invention can be applied to a variety of devices such as dynamic random access memory devices (DRAM), static random access memory devices (SRAM), application specific integrated circuit devices (ASIC), microprocessors and microcontrollers, Flash memory devices, and others.
Integrated circuits or “ICs” have evolved from a handful of interconnected devices fabricated on a single chip of silicon to millions of devices. Current ICs provide performance and complexity far beyond what was originally imagined. In order to achieve improvements in complexity and circuit density (i.e., the number of devices capable of being packed onto a given chip area), the size of the smallest device feature, also known as the device “geometry”, has become smaller with each generation of ICs. Semiconductor devices are now being fabricated with features less than a quarter of a micron across.
Increasing circuit density has not only improved the complexity and performance of ICs but has also provided lower cost parts to the consumer. An IC fabrication facility can cost hundreds of millions, or even billions, of dollars. Each fabrication facility will have a certain throughput of wafers, and each wafer will have a certain number of ICs on it. Therefore, by making the individual devices of an IC smaller, more devices may be fabricated on each wafer, thus increasing the output of the fabrication facility. Making devices smaller is very challenging, as each process used in IC fabrication has a limit. That is to say, a given process typically only works down to a certain feature size, and then either the process or the device layout needs to be changed. An example of such a limit is the ability to remove a layer and form a patterned structure, which is used as a contact region. The contract region should be free and clear from undesirable materials that cause electrical resistance.
As merely an example, patterning and etching processes are often used to remove or partially remove a layer to form contact structures therefrom. An etching tool such as a dry or wet etcher often performs etching. The wet etcher often includes a vessel that has an etchant chemical to selectively remove one material from another material. The dry etcher often includes a plasma source and treatment chamber. The dry etcher often uses gases such as fluorine bearing species and chlorine bearing species to remove semiconductor materials such as silicon or metal such as aluminum. Unfortunately, etching is often not precise. Etching also often does not remove all materials from contact regions, which lead to undesirable resistance between contact regions and overlying metal layers. Such resistance is often difficult to see or even detect until the device has been completely fabricated. The defective device often results in yield loss and reliability problems of the device. Such defects are often difficult to uncover during processing and even more difficult to correct after detection such conventional semiconductor devices often goes through hundreds of processes that may lead to such defects.
From the above, it is seen that an improved technique for processing semiconductor devices is desired.